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Interconnect and logic resources to manage whole connectivity among all components in an Altera SoPC system Is automatically generated by Qsys Components must comply with the standardized Avalon® interfaces, which are specialized for: Reading and writing registers and memory Streaming high-speed data Controlling off-chip devicesĬustom logic can interact with a Computer system by: an Avalon interface, so that it can be part of the SoPC a generic interface, which can be connected to a PIO peripheral inside the SoPCĤ Avalon interfaces (1) Avalon Memory Mapped Interface (Avalon-MM)Īn address-based read/write interface typical of master–slave connections Avalon Streaming Interface (Avalon-ST) Supports unidirectional flow of data, including multiplexed streams, packets, and DSP data Avalon Interrupt Interface (Sender/Receiver) An interface that allows components to signal events to other componentsĥ Avalon interfaces (2) Avalon Clock Interface Avalon Reset InterfaceĪn interface that drives or receives clocks (all Avalon interfaces are synchronous) Avalon Reset Interface An interface that provides reset connectivity Avalon Conduit Interface An interface type that accommodates individual signals or groups of signals that do not fit into any of the other Avalon interfaces Avalon Tri-State Conduit Interface (Avalon-TC) An interface to support connections to off-chip peripherals. SISTEMI EMBEDDED System Interconnect Fabric Federico Baronti Last version: Presentation on theme: "System Interconnect Fabric"- Presentation transcript: